A CMOS imager circuit includes a focal plane array of pixel cells, each one of the cells including a photoconversion device, for example, a photogate, a photoconductor, or a photodiode, for generating and accumulating photo-generated charge in a portion of the substrate. A readout circuit is connected to each pixel cell and includes at least an output transistor, which receives photogenerated charges from a doped diffusion region and produces an output signal which is periodically read-out through a pixel access transistor. The imager may optionally include a transistor for transferring charge from the photoconversion device to the diffusion region or the diffusion region may be directly connected to or part of the photoconversion device. A transistor is also typically provided for resetting the diffusion region to a predetermined charge level before it receives the photo-converted charges. A CMOS imager circuit is often associated with a color filter, such as a Bayer filter for discerning varying wavelengths of light.
One typical CMOS imager pixel circuit, the three-transistor (3T) pixel, contains a photodiode for supplying photo-generated charge to a diffusion region; a reset transistor for resetting the diffusion region; a source follower transistor having a gate connected to the diffusion region, for producing an output signal; and a row select transistor for selectively connecting the source follower transistor to a column line of a pixel array. Another typical CMOS imager pixel employs a four-transistor (4T) configuration, which is similar to the 3T configuration, but utilizes a transfer transistor to gate charges from the photodiode to the diffusion region and the source follower transistor for output.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630 to Rhodes, U.S. Pat. No. 6,376,868 to Rhodes, U.S. Pat. No. 6,310,366 to Rhodes et al., U.S. Pat. No. 6,326,652 to Rhodes, U.S. Pat. No. 6,204,524 to Rhodes, and U.S. Pat. No. 6,333,205 to Rhodes. The disclosures of each of the forgoing are hereby incorporated by reference herein in their entirety.
Typical imager devices have a light shield providing apertures exposing at least a portion of the photoconversion devices to incoming light while shielding the remainder of the pixel circuit from the light. Light shields serve to better separate received light signals of adjacent pixels and prevent photocurrent from being generated in undesirable locations in the pixel so that the imager device can achieve higher resolution images with less blooming, blurring, and other detrimental effects. Light shields can also serve to protect the circuitry associated with the pixels.
In the prior art, light shields have typically been formed in the metal interconnect layering (e.g., Metal 1, Metal 2, or, if utilized, Metal 3 layers) of the integrated circuit. A metallization layer light shield structure has some drawbacks, such as limiting use of the metal layer to the light shield rather than for its normal conductive interconnect purpose. Additionally, having the light shield in upper metallization (conductive interconnect) layers spaced from the photo-sensitive area can increase light piping and light shadowing in the pixels, which can cause errors in device functioning.